UEFI Platform Initialization Specification
Version 1.9
Specification Organization
Revision History
Volume I: Pre-EFI Initialization Core Interface
List of Figures
List of Tables
1. Introduction
2. Overview
3. PEI Services Table
4. Services - PEI
5. PEI Foundation
6. Architectural PPIs
7. PEIMs
8. Additional PPIs
9. PEI to DXE Handoff
10. Boot Paths
11. PEI Physical Memory Usage
12. Special Paths Unique to the ItaniumĀ® Processor Family
13. Security (SEC) Phase Information
14. Dependency Expression Grammar
15. TE Image
16. TE Image Creation
17. TE Image Loading
Volume II: Driver Execution Environment Core Interface
List of Figures
List of Tables
1. Introduction
2. Overview
3. Boot Manager
4. UEFI System Table
5. Services - Boot Services
6. Runtime Capabilities
7. Services - DXE Services
8. Protocols - Device Path Protocol
9. DXE Foundation
10. DXE Dispatcher
11. DXE Drivers
12. DXE Architectural Protocols
13. DXE Boot Services Protocol
14. DXE Runtime Protocols
15. Dependency Expression Grammar
Appendix: Error Codes
Appendix: GUID Definitions
Volume III: Shared Architectural Elements
List of Figures
List of Tables
1. Introduction
2. Firmware Storage Design Discussion
3. Firmware Storage Code Definitions
4. HOB Design Discussion
5. HOB Code Definitions
6. Status Codes
7. Report Status Code Routers
8. PCD
Volume IV: Management Mode Core Interface
List of Figures
List of Tables
1. Overview
2. MM Foundation Entry Point
3. Management Mode System Table (MMST)
4. MM Protocols
5. UEFI Protocols
6. PI PEI PPIs
7. MM Child Dispatch Protocols
8. Interactions with PEI, DXE, and BDS
9. Other Related Notes For Support Of MM Drivers
10. MCA/INIT/PMI Protocol
11. Extended SAL Services
12. SMM SPI Protocol Stack
Appendix: Management Mode Backward Compatibility Types
Volume V: Standards
List of Figures
List of Tables
1. Introduction
2. SMBus Host Controller Design Discussion
3. SMBus Host Controller Code Definitions
4. SMBus Design Discussion
5. SMBus PPI Code Definitions
6. SMBIOS Protocol
7. IDE Controller
8. S3 Resume
9. ACPI System Description Table Protocol
10. PCI Host Bridge
11. PCI Platform
12. Hot Plug PCI
13. Super I/O Protocol
14. Super I/O and ISA Host Controller Interactions
15. CPU I/O Protocol
16. Legacy Region Protocol
17. I
2
C Protocol Stack
18. SPI Protocol Stack
Appendix: Error Codes
Index
UEFI Platform Initialization Specification
Index
Index
Symbols
|
A
|
B
|
C
|
D
|
E
|
H
|
I
|
J
|
L
|
M
|
P
|
R
|
S
|
U
Symbols
16-bit PC Card
A
AP
B
BSP
C
CardBay PC Card
CardBus bridge
CardBus PC Card
D
debug code
DXE
E
EFI
error code
H
HB
HPB
HPC
HPRT
I
Incompatible PCI device
IP
IPI
J
JEITA
L
legacy PHPC
M
MM
MM Driver
MM Driver Initialization
MM Driver Runtime
MM Entry Point
MM handler
MMI
MMI Source.
MMST
MP
MTRR
MWI
P
PC Card
PC Card Standard
PCI bus
PCI bus driver
PCI configuration space
PCI controller
PCI device
PCI enumeration
PCI function
PCI host bridge
PCI root bridge
PCI segment
PCI-to-CardBus bridges
PEC
PEIM
PERR
PHPC
PPI
progress code
R
RB
resource padding
root HPC
root PCI bus
RSM
S
SERR
SHPC
SMBus
SMBus host controller
SMBus master device
SMBus PPI
SMBus slave device
status code
status code driver
U
UDID