List of Figures

Chapter 1

Fig. 1.1 UEFI Conceptual Overview

Chapter 2

Fig. 2.1 Booting Sequence

Fig. 2.2 Stack After AddressOfEntryPoint Called, IA-32

Fig. 2.3 Stack after AddressOfEntryPoint Called, Itanium-based Systems

Fig. 2.4 Construction of a Protocol

Fig. 2.5 Desktop System

Fig. 2.6 Server System

Fig. 2.7 Image Handle

Fig. 2.8 Driver Image Handle

Fig. 2.9 Host Bus Controllers

Fig. 2.10 PCI Root Bridge Device Handle

Fig. 2.11 Connecting Device Drivers

Fig. 2.12 Connecting Bus Drivers

Fig. 2.13 Child Device Handle with a Bus Specific Override

Fig. 2.14 Software Service Relationships

Chapter 5

Fig. 5.1 MBRDisk Layout with legacy MBR example

Fig. 5.2 GPT disk layout with protective MBR

Fig. 5.3 GPT disk layout with protective MBR on a diskwith capacity > LBA 0xFFFFFFFF

Fig. 5.4 GUID Partition Table (GPT) example

Chapter 6

Fig. 6.1 The BTT Layout in a BTT Arena

Fig. 6.2 A BTT With Multiple Arenas in a Large Namespace

Fig. 6.3 Cyclic Sequence Numbers for Flog Entries

Fig. 6.4 BTT Read Path Overview

Fig. 6.5 BTT Write Path Overview

Chapter 7

Fig. 7.1 Device Handle to Protocol Handler Mapping

Fig. 7.2 Handle Database

Chapter 8

Fig. 8.1 Scatter-Gather List of EFI_CAPSULE_BLOCK_DESCRIPTOR Structures

Chapter 9

Chapter 10

Chapter 11

Fig. 11.1 Driver Health Status States

Chapter 12

Fig. 12.1 Serial Device Identification Driver Relationships

Fig. 12.2 Software BLT Buffer

Chapter 13

Fig. 13.1 Nesting of Legacy MBR Partition Records

Fig. 13.2 Cyclic Sequence Numbers in Label Index Block

Fig. 13.3 Organization of the Label Storage Area

Chapter 14

Fig. 14.1 Host Bus Controllers

Fig. 14.2 Device Handle for a PCI Root Bridge Controller

Fig. 14.3 Desktop System with One PCI Root Bridge

Fig. 14.4 Server System with Four PCI Root Bridges

Fig. 14.5 Server System with Two PCI Segments

Fig. 14.6 Server System with Two PCI Host Buses

Fig. 14.7 Image Handle

Fig. 14.8 PCI Driver Image Handle

Fig. 14.9 PCI Host Bus Controller

Fig. 14.10 Device Handle for a PCI Host Bus Controller

Fig. 14.11 Physical PCI Bus Structure

Fig. 14.12 Connecting a PCI Bus Driver

Fig. 14.13 Child Handle Created by a PCI Bus Driver

Fig. 14.14 Connecting a PCI Device Driver

Fig. 14.15 Unsigned PCI Driver Image Layout

Fig. 14.16 Signed and Compressed PCI Driver Image Flow

Fig. 14.17 Signed and Compressed PCI Driver Image Layout

Fig. 14.18 Signed but not Compressed PCI Driver Image Flow

Fig. 14.19 Signed and Uncompressed PCI Driver Image Layout

Chapter 15

Fig. 15.1 Device Handle for a SCSI Bus Controller

Fig. 15.2 Child Handle Created by a SCSI Bus Driver

Chapter 16

Chapter 17

Fig. 17.1 Software Triggered State Transitions of a USB Host Controller

Fig. 17.2 USB Bus Controller Handle

Fig. 17.3 Sequence of Operations with Endpoint Policy Changes

Chapter 18

Fig. 18.1 Debug Support Table Indirection and Pointer Usage

Chapter 19

Fig. 19.1 Bit Sequence of Compressed Data

Fig. 19.2 Compressed Data Structure

Fig. 19.3 Block Structure

Fig. 19.4 Block Body

Fig. 19.5 String Info Log Search Tree

Fig. 19.6 Node Split

Chapter 20

Chapter 21

Chapter 22

Chapter 23

Fig. 23.1 Firmware Image with no Authentication Support

Fig. 23.2 Firmware Image with Authentication Support

Fig. 23.3 Firmware Image with Dependency/AuthenticationSupport

Fig. 23.4 Optional Scatter-Gather Construction of Capsule Submitted to Update Capsule()

Fig. 23.5 Capsule Header and Firmware Management Capsule Header

Fig. 23.6 Firmware Management and Firmware Image Management headers

Chapter 24

Fig. 24.1 IPv6-based PXE Boot

Fig. 24.2 Netboot6 (DHCP6 and ProxyDHCP6 reside on the same server)

Fig. 24.3 IPv6-based PXE boot (DHCP6 and ProxyDHCP6reside on the different server)

Fig. 24.4 HTTP Boot Network Topology Concept - Corporate Environment

Fig. 24.5 HTTP Boot Network Topology with Proxy Concept - Corporate Environment

Fig. 24.6 HTTP Boot Network Topology Concept2 — Homeenvironments

Fig. 24.7 UEFI HTTP Boot Protocol Layout

Fig. 24.8 HTTP Boot Overall Flow

Chapter 25

Chapter 26

Chapter 27

Chapter 28

Chapter 29

Fig. 29.1 EFI REST Support, Single Protocol

Fig. 29.2 EFI REST Support, Multiple Protocols

Fig. 29.3 EFI REST Support, BMC on Board

Fig. 29.4 EFI REST Support, Redfish Service

Fig. 29.5 EFI REST Support, Protocol Usages

Chapter 30

Chapter 31

Chapter 32

Fig. 32.1 Creating A Digital Signature

Fig. 32.2 Veriying a Digital Signature

Fig. 32.3 Embedded Digital Certificates

Fig. 32.4 Secure Boot Modes

Fig. 32.5 Signature Lists

Fig. 32.6 Process for Adding a New Signature by the OS

Fig. 32.7 Authorization Process Flow

Chapter 33

Fig. 33.1 Platform Configuration Overview

Fig. 33.2 HII Resources In Drivers & Applications

Fig. 33.3 Creating UI Resources With Resource Files

Fig. 33.4 Creating UI Resources With Intermediate Source Representation

Fig. 33.5 The Platform and Standard User Interactions

Fig. 33.6 User and Platform Component Interaction

Fig. 33.7 User Interface Components

Fig. 33.8 Connected Forms Browser/Processor

Fig. 33.9 Disconnected Forms Browser/Processor

Fig. 33.10 O/S-Present Forms Browser/Processor

Fig. 33.11 Platform Data Storage

Fig. 33.12 Keyboard Layout

Fig. 33.13 Forms-based Interface Example

Fig. 33.14 Platform Configuration Overview

Fig. 33.15 Question Value Retrieval Process

Fig. 33.16 Question Value Change Process

Fig. 33.17 String Identifiers

Fig. 33.18 Fonts

Fig. 33.19 Font Description Terms

Fig. 33.20 16 x 19 Font Parameters

Fig. 33.21 Font Structure Layout

Fig. 33.22 Proportional Font Parameters and Byte Padding

Fig. 33.23 Aligning Glyphs

Fig. 33.24 HII Database

Fig. 33.25 Setup Browser

Fig. 33.26 Storing Configuration Settings

Fig. 33.27 OS Runtime Utilization

Fig. 33.28 Standard Application Obtaining Setting Example

Fig. 33.29 Typical Forms Processor Decisions Necessitating a Callback (1)

Fig. 33.30 Typical Forms Processor Decisions Necessitating a Callback (2)

Fig. 33.31 Typical Forms Processor Decisions Necessitating a Callback (3)

Fig. 33.32 Driver Model Interactions

Fig. 33.33 Managing Human Interface Components

Fig. 33.34 EFI IFR Form Set configuration

Fig. 33.35 EFI IFR Form Set Question Changes

Fig. 33.36 Glyph Information Encoded in Blocks

Fig. 33.37 Glyph Block Processing

Fig. 33.38 EFI_HII_GIBT_GLYPH_VARIABLITY Glyph Drawing Processing

Fig. 33.39 String Information Encoded in Blocks

Fig. 33.40 String Block Processing: Base Processing

Fig. 33.41 String Block Processing: SCSU Processing

Fig. 33.42 String Block Processing: UTF Processing

Fig. 33.43 Image Information Encoded in Blocks

Fig. 33.44 Palette Structure of a Black & White, One-BitImage

Fig. 33.45 Palette Structure of a Four-Bit Image

Fig. 33.46 Palette Structure of a Four-Bit, Six-ColorImage

Fig. 33.47 Simple Binary Object

Fig. 33.48 Password Flowchart (part one)

Fig. 33.49 Password Flowchart (part two)

Fig. 33.50 Animation Information Encoded in Blocks

Chapter 34

Fig. 34.1 Glyph Example

Fig. 34.2 How EFI_HII_IMAGE_EX_PROTOCOL uses EFI_HII_IMAGE_DECODER_PROTOCOL

Fig. 34.3 Keyboard Layout

Chapter 35

Chapter 36

Fig. 36.1 User Identity

Fig. 36.2 User Identity Manager

Chapter 37

Fig. 37.1 Hash workflow

Chapter 38

Chapter 39

Appendix A

Appendix B

Appendix C

Fig. C.1 Example Computer System

Fig. C.2 Partial ACPI Name Space for Example System

Fig. C.3 EFI Device Path Displayed As a Name Space

Appendix D

Appendix E

Fig. E.1 Network Stacks with Three Classes of Drivers

Fig. E.2 !PXE Structures for H/W and S/W UNDI

Fig. E.3 Issuing UNDI Commands

Fig. E.4 UNDI Command Descriptor Block (CDB)

Fig. E.5 Storage Types

Fig. E.6 UNDI States, Transitions & Valid Commands

Fig. E.7 Linked CDBs

Fig. E.8 Queued CDBs

Appendix F

Appendix G

Appendix H

Appendix I

Appendix J

Appendix K

Appendix L

Appendix M

Appendix N

Fig. N.1 Error Record Format

Appendix O

Appendix P

Appendix Q

Appendix R