Version 1.9
September, 2024
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Copyright © 2024, Unified Extensible Firmware Interface (UEFI) Forum, Inc. All Rights Reserved. The UEFI Forum is the owner of all rights and title in and to this work, including all copyright rights that may exist, and all rights to use and reproduce this work. Further to such rights, permission is hereby granted to any person implementing this specification to maintain an electronic version of this work accessible by its internal personnel, and to print a copy of this specification in hard copy form, in whole or in part, in each case solely for use by that person in connection with the implementation of this Specification, provided no modification is made to the Specification.
Table of Contents
- 1. Introduction
- 2. Overview
- 3. PEI Services Table
- 4. Services - PEI
- 5. PEI Foundation
- 5.1. Introduction
- 5.1.1. Prerequisites
- 5.1.2. Processor Execution Mode
- 5.1.2.1. Processor Execution Mode in IA-32 Intel ® Architecture
- 5.1.2.2. Processor Execution Mode in Itanium ® Processor Family
- 5.1.2.3. Access to the Boot Firmware Volume (BFV) andother boot-critical FVs
- 5.1.2.4. Access to the Boot Firmware Volume in IA-32Intel Architecture
- 5.1.2.5. Access to the Boot Firmware Volume in ItaniumProcessor Family
- 5.2. PEI Foundation Entry Point
- 5.3. PEI Calling Convention Processor Binding
- 5.4. PEI Services Table Retrieval
- 5.5. PEI Dispatcher Introduction
- 5.6. Ordering
- 5.7. Dependency Expressions
- 5.8. Dispatch Algorithm
- 5.8.1. Overview
- 5.8.2. Requirements
- 5.8.2.1. Requirements of a Dispatching Algorithm
- 5.8.2.2. Preserving Weak Ordering
- 5.8.2.3. Preventing Infinite Loops
- 5.8.2.4. Controlling Processor Register Resources
- 5.8.2.5. Preserving Proper Dispatch Order
- 5.8.2.6. Using Available Memory
- 5.8.2.7. Invoking the PEIM’s Entry Point
- 5.8.2.8. Knowing When Dispatcher Tasks Are Finished
- 5.8.2.9. Reporting PEI Core Location
- 5.8.3. Example Dispatch Algorithm
- 5.8.4. Dispatching When Memory Exists
- 5.8.5. PEIM Dispatching
- 5.8.6. PEIM Authentication
- 5.1. Introduction
- 6. Architectural PPIs
- 6.1. Introduction
- 6.2. Required Architectural PPIs
- 6.3. Optional Architectural PPIs
- 6.3.1. Boot in Recovery Mode PPI (Optional)
- 6.3.2. End of PEI Phase PPI (Optional)
- 6.3.3. PEI Reset PPI
- 6.3.4. PEI Reset2 PPI
- 6.3.5. Status Code PPI (Optional)
- 6.3.6. Security PPI (Optional)
- 6.3.7. Temporary RAM Support PPI (Optional)
- 6.3.8. Temporary RAM Done PPI (Optional)
- 6.3.9. EFI_PEI_CORE_FV_LOCATION_PPI
- 7. PEIMs
- 8. Additional PPIs
- 8.1. Introduction
- 8.2. Required Additional PPIs
- 8.3. Optional Additional PPIs
- 8.3.1. SEC Platform Information PPI (Optional)
- 8.3.2. SEC Platform Information 2 PPI (Optional)
- 8.3.3. Loaded Image PPI (Optional)
- 8.3.4. SEC HOB PPI
- 8.3.5. Recovery
- 8.3.6. EFI PEI Recovery Block IO2 PPI
- 8.3.7. EFI PEI Vector Handoff Info PPI
- 8.3.8. CPU I/O PPI (Optional)
- 8.3.8.1. EFI_PEI_CPU_IO_PPI (Optional)
- 8.3.8.2. EFI_PEI_CPU_IO_PPI.Mem()
- 8.3.8.3. EFI_PEI_CPU_IO_PPI.Io()
- 8.3.8.4. EFI_PEI_CPU_IO_PPI.IoRead8()
- 8.3.8.5. EFI_PEI_CPU_IO_PPI.IoRead16()
- 8.3.8.6. EFI_PEI_CPU_IO_PPI.IoRead32()
- 8.3.8.7. EFI_PEI_CPU_IO_PPI.IoRead64()
- 8.3.8.8. EFI_PEI_CPU_IO_PPI.IoWrite8()
- 8.3.8.9. EFI_PEI_CPU_IO_PPI.IoWrite16()
- 8.3.8.10. EFI_PEI_CPU_IO_PPI.IoWrite32()
- 8.3.8.11. EFI_PEI_CPU_IO_PPI.IoWrite64()
- 8.3.8.12. EFI_PEI_CPU_IO_PPI.MemRead8()
- 8.3.8.13. EFI_PEI_CPU_IO_PPI.MemRead16()
- 8.3.8.14. EFI_PEI_CPU_IO_PPI.MemRead32()
- 8.3.8.15. EFI_PEI_CPU_IO_PPI.MemRead64()
- 8.3.8.16. EFI_PEI_CPU_IO_PPI.MemWrite8()
- 8.3.8.17. EFI_PEI_CPU_IO_PPI.MemWrite16()
- 8.3.8.18. EFI_PEI_CPU_IO_PPI.MemWrite32()
- 8.3.8.19. EFI_PEI_CPU_IO_PPI.MemWrite64()
- 8.3.9. EFI Pei Capsule PPI
- 8.3.9.1. EFI_PEI_CAPSULE_PPI (Optional)
- 8.3.9.2. EFI_PEI_CAPSULE_PPI.Coalesce
- 8.3.9.3. EFI_PEI_CAPSULE_CHECK_CAPSULE_UDPATE.CheckCapsuleUpdate()
- 8.3.9.4. EFI_PEI_CAPSULE_CHECK_CAPSULE_UDPATE.CapsuleCreateState()
- 8.3.9.5. EFI_PEI_MP_SERVICES_PPI (Optional)
- 8.3.9.6. EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors()
- 8.3.9.7. EFI_PEI_MP_SERVICES_PPI.GetProcessorInfo()
- 8.3.9.8. EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- 8.3.9.9. EFI_PEI_MP_SERVICES_PPI.StartupThisAP ()
- 8.3.9.10. EFI_PEI_MP_SERVICES_PPI.SwitchBSP ()
- 8.3.9.11. EFI_PEI_MP_SERVICES_PPI.WhoAmI ()
- 8.3.9.12. EDKII_PEI_MP_SERVICES2_PPI (Optional)
- 8.3.9.13. EDKII_PEI_MP_SERVICES2_PPI.GetNumberOfProcessors()
- 8.3.9.14. EDKII_PEI_MP_SERVICES2_PPI.GetProcessorInfo()
- 8.3.9.15. EDKII_PEI_MP_SERVICES2_PPI.StartupAllAPs()
- 8.3.9.16. EDKII_PEI_MP_SERVICES2_PPI.StartupThisAP ()
- 8.3.9.17. EDKII_PEI_MP_SERVICES2_PPI.SwitchBSP ()
- 8.3.9.18. EDKII_PEI_MP_SERVICES2_PPI.WhoAmI ()
- 8.3.9.19. EDKII_PEI_MP_SERVICES2_PPI.StartupAllCPUs ()
- 8.3.9.20. Random Number Generator PPI
- 8.4. Graphics PEIM Interfaces
- 9. PEI to DXE Handoff
- 10. Boot Paths
- 11. PEI Physical Memory Usage
- 12. Special Paths Unique to the Itanium® Processor Family
- 13. Security (SEC) Phase Information
- 14. Dependency Expression Grammar
- 15. TE Image
- 16. TE Image Creation
- 17. TE Image Loading
- 1. Introduction
- 2. Overview
- 3. Boot Manager
- 4. UEFI System Table
- 5. Services - Boot Services
- 6. Runtime Capabilities
- 7. Services - DXE Services
- 7.1. Introduction
- 7.2. Global Coherency Domain Services
- 7.2.1. Global Coherency Domain (GCD) Services Overview
- 7.2.2. GCD Memory Resources
- 7.2.3. GCD I/O Resources
- 7.2.4. Global Coherency Domain Services
- 7.2.4.1. AddMemorySpace()
- 7.2.4.2. AllocateMemorySpace()
- 7.2.4.3. FreeMemorySpace()
- 7.2.4.4. RemoveMemorySpace()
- 7.2.4.5. GetMemorySpaceDescriptor()
- 7.2.4.6. SetMemorySpaceAttributes()
- 7.2.4.7. SetMemorySpaceCapabilities()
- 7.2.4.8. GetMemorySpaceMap()
- 7.2.4.9. AddIoSpace()
- 7.2.4.10. AllocateIoSpace()
- 7.2.4.11. FreeIoSpace()
- 7.2.4.12. RemoveIoSpace()
- 7.2.4.13. GetIoSpaceDescriptor()
- 7.2.4.14. GetIoSpaceMap()
- 7.3. Dispatcher Services
- 8. Protocols - Device Path Protocol
- 9. DXE Foundation
- 9.1. Introduction
- 9.2. Hand-Off Block (HOB) List
- 9.3. DXE Foundation Data Structures
- 9.4. Required DXE Foundation Components
- 9.5. Handing Control to DXE Dispatcher
- 9.6. DXE Foundation Entry Point
- 9.7. Dependencies
- 9.8. HOB Translations
- 10. DXE Dispatcher
- 10.1. Introduction
- 10.2. Requirements
- 10.3. The A Priori File
- 10.4. Firmware Volume Image Files
- 10.5. Dependency Expressions
- 10.6. Dependency Expressions Overview
- 10.7. Dependency Expression Instruction Set
- 10.8. Dependency Expression with No Dependencies
- 10.9. Empty Dependency Expressions
- 10.10. Dependency Expression Reverse Polish Notation (RPN)
- 10.11. DXE Dispatcher State Machine
- 10.12. Example Orderings
- 10.13. Security Considerations
- 11. DXE Drivers
- 12. DXE Architectural Protocols
- 12.1. Introduction
- 12.2. Boot Device Selection (BDS) Architectural Protocol
- 12.3. CPU Architectural Protocol
- 12.3.1. EFI_CPU_ARCH_PROTOCOL
- 12.3.2. EFI_CPU_ARCH_PROTOCOL.FlushDataCache()
- 12.3.3. EFI_CPU_ARCH_PROTOCOL.EnableInterrupt()
- 12.3.4. EFI_CPU_ARCH_PROTOCOL.DisableInterrupt()
- 12.3.5. EFI_CPU_ARCH_PROTOCOL.GetInterruptState()
- 12.3.6. EFI_CPU_ARCH_PROTOCOL.Init()
- 12.3.7. EFI_CPU_ARCH_PROTOCOL.RegisterInterruptHandler()
- 12.3.8. EFI_CPU_ARCH_PROTOCOL.GetTimerValue()
- 12.3.9. EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes()
- 12.4. Metronome Architectural Protocol
- 12.5. Monotonic Counter Architectural Protocol
- 12.6. Real Time Clock Architectural Protocol
- 12.7. Reset Architectural Protocol
- 12.8. Runtime Architectural Protocol
- 12.9. Security Architectural Protocols
- 12.10. Timer Architectural Protocol
- 12.11. Variable Architectural Protocol
- 12.12. Variable Write Architectural Protocol
- 12.13. EFI Capsule Architectural Protocol
- 12.14. Watchdog Timer Architectural Protocol
- 13. DXE Boot Services Protocol
- 13.1. Overview
- 13.2. Conventions and Abbreviations
- 13.3. MP Services Protocol Overview
- 13.4. MP Services Protocol
- 13.4.1. EFI_MP_SERVICES_PROTOCOL
- 13.4.2. EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors()
- 13.4.3. EFI_MP_SERVICES_PROTOCOL.GetProcessorInfo()
- 13.4.4. EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- 13.4.5. EFI_MP_SERVICES_PROTOCOL.StartupThisAP()
- 13.4.6. EFI_MP_SERVICES_PROTOCOL.SwitchBSP()
- 13.4.7. EFI_MP_SERVICES_PROTOCOL.EnableDisableAP()
- 13.4.8. EFI_MP_SERVICES_PROTOCOL.WhoAmI()
- 14. DXE Runtime Protocols
- 15. Dependency Expression Grammar
- 1. Introduction
- 2. Firmware Storage Design Discussion
- 2.1. Firmware Storage Introduction
- 2.2. PI Architecture Firmware File System Format
- 3. Firmware Storage Code Definitions
- 3.1. Firmware Storage Code Definitions Introduction
- 3.2. Firmware Storage Formats
- 3.2.1. Firmware Volume
- 3.2.2. Firmware File System
- 3.2.3. Firmware File
- 3.2.4. Firmware File Section
- 3.2.5. Firmware File Section Types
- 3.2.5.1. EFI_SECTION_COMPATIBILITY16
- 3.2.5.2. EFI_SECTION_COMPRESSION
- 3.2.5.3. EFI_SECTION_DISPOSABLE
- 3.2.5.4. EFI_SECTION_DXE_DEPEX
- 3.2.5.5. EFI_SECTION_FIRMWARE_VOLUME_IMAGE
- 3.2.5.6. EFI_SECTION_FREEFORM_SUBTYPE_GUID
- 3.2.5.7. EFI_SECTION_GUID_DEFINED
- 3.2.5.8. EFI_SECTION_PE32
- 3.2.5.9. EFI_SECTION_PEI_DEPEX
- 3.2.5.10. EFI_SECTION_PIC
- 3.2.5.11. EFI_SECTION_RAW
- 3.2.5.12. EFI_SECTION_MM_DEPEX
- 3.2.5.13. EFI_SECTION_TE
- 3.2.5.14. EFI_SECTION_USER_INTERFACE
- 3.2.5.15. EFI_SECTION_VERSION
- 3.3. PEI
- 3.3.1. EFI_PEI_FIRMWARE_VOLUME_INFO_PPI
- 3.3.2. EFI_PEI_FIRMWARE_VOLUME_INFO2_PPI
- 3.3.3. PEI Firmware Volume PPI
- 3.3.3.1. EFI_PEI_FIRMWARE_VOLUME_PPI
- 3.3.3.2. EFI_PEI_FIRMWARE_VOLUME_PPI.ProcessVolume()
- 3.3.3.3. EFI_PEI_FIRMWARE_VOLUME_PPI.FindFileByType()
- 3.3.3.4. EFI_PEI_FIRMWARE_VOLUME_PPI.FindFileByName()
- 3.3.3.5. EFI_PEI_FIRMWARE_VOLUME_PPI.GetFileInfo()
- 3.3.3.6. EFI_PEI_FIRMWARE_VOLUME_PPI.GetFileInfo2()
- 3.3.3.7. EFI_PEI_FIRMWARE_VOLUME_PPI.GetVolumeInfo()
- 3.3.3.8. EFI_PEI_FIRMWARE_VOLUME_PPI.FindSectionByType()
- 3.3.3.9. EFI_PEI_FIRMWARE_VOLUME_PPI.FindSectionByType2()
- 3.3.4. PEI Load File PPI
- 3.3.5. PEI Guided Section Extraction PPI
- 3.3.6. PEI Decompress PPI
- 3.4. DXE
- 3.4.1. Firmware Volume2 Protocol
- 3.4.1.1. EFI_FIRMWARE_VOLUME2_PROTOCOL
- 3.4.1.2. EFI_FIRMWARE_VOLUME2_PROTOCOL.GetVolumeAttributes()
- 3.4.1.3. EFI_FIRMWARE_VOLUME2_PROTOCOL.SetVolumeAttributes()
- 3.4.1.4. EFI_FIRMWARE_VOLUME2_PROTOCOL.ReadFile()
- 3.4.1.5. EFI_FIRMWARE_VOLUME2_PROTOCOL.ReadSection()
- 3.4.1.6. EFI_FIRMWARE_VOLUME2_PROTOCOL.WriteFile()
- 3.4.1.7. EFI_FIRMWARE_VOLUME2_PROTOCOL.GetNextFile()
- 3.4.1.8. EFI_FIRMWARE_VOLUME2_PROTOCOL.GetInfo()
- 3.4.1.9. EFI_FIRMWARE_VOLUME2_PROTOCOL.SetInfo()
- 3.4.2. Firmware Volume Block2 Protocol
- 3.4.2.1. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
- 3.4.2.2. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.GetAttributes()
- 3.4.2.3. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.SetAttributes()
- 3.4.2.4. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.GetPhysicalAddress()
- 3.4.2.5. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.GetBlockSize()
- 3.4.2.6. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.Read()
- 3.4.2.7. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.Write()
- 3.4.2.8. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.EraseBlocks()
- 3.4.3. Guided Section Extraction Protocol
- 3.4.1. Firmware Volume2 Protocol
- 3.5. SMM
- 4. HOB Design Discussion
- 5. HOB Code Definitions
- 5.1. HOB Introduction
- 5.2. HOB Generic Header
- 5.3. PHIT HOB
- 5.4. Memory Allocation HOB
- 5.5. Resource Descriptor HOB
- 5.6. GUID Extension HOB
- 5.7. Firmware Volume HOB
- 5.8. CPU HOB
- 5.9. Memory Pool HOB
- 5.10. UEFI Capsule HOB
- 5.11. Unused HOB
- 5.12. End of HOB List HOB
- 5.13. SMRAM Memory Hob
- 6. Status Codes
- 6.1. Status Codes Overview
- 6.2. Terms
- 6.3. Types of Status Codes
- 6.4. Hardware Classes
- 6.5. Software Classes
- 6.5.1. Host Software Class
- 6.5.2. Instance Number
- 6.5.3. Progress Code Operations
- 6.5.4. Error Code Operations
- 6.5.5. Subclasses
- 6.5.5.1. Defined Subclasses
- 6.5.5.2. Unspecified Subclass
- 6.5.5.3. SEC Subclass
- 6.5.5.4. PEI Foundation Subclass
- 6.5.5.5. PEI Module Subclass
- 6.5.5.6. DXE Foundation Subclass
- 6.5.5.7. DXE Boot Service Driver Subclass
- 6.5.5.8. DXE Runtime Service Driver Subclass
- 6.5.5.9. SMM Driver Subclass
- 6.5.5.10. EFI Application Subclass
- 6.5.5.11. OS Loader Subclass
- 6.5.6. Runtime (RT) Subclass
- 6.6. Code Definitions
- 6.7. Class Definitions
- 6.7.1. Computing Unit Class
- 6.7.1.1. Subclass Definitions
- 6.7.1.2. Progress Code Definitions
- 6.7.1.3. Error Code Definitions
- 6.7.1.4. Extended Data Formats
- 6.7.1.5. EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA
- 6.7.1.6. EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA
- 6.7.1.7. EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA
- 6.7.1.8. EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA
- 6.7.1.9. EFI_COMPUTING_UNIT_THERMAL_ERROR_DATA
- 6.7.1.10. EFI_CACHE_INIT_DATA
- 6.7.1.11. EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA
- 6.7.1.12. EFI_MEMORY_EXTENDED_ERROR_DATA
- 6.7.1.13. EFI_STATUS_CODE_DIMM_NUMBER
- 6.7.1.14. EFI_MEMORY_MODULE_MISMATCH_ERROR_DATA
- 6.7.1.15. EFI_MEMORY_RANGE_EXTENDED_DATA
- 6.7.2. User-Accessible Peripherals Class
- 6.7.3. I/O Bus Class
- 6.7.4. Software Classes
- 6.7.4.1. Subclass Definitions
- 6.7.4.2. Progress Code Definitions
- 6.7.4.3. Error Code Definitions
- 6.7.4.4. Extended Data Formats
- 6.7.4.5. EFI_DEBUG_ASSERT_DATA
- 6.7.4.6. EFI_STATUS_CODE_EXCEP_EXTENDED_DATA
- 6.7.4.7. EFI_STATUS_CODE_START_EXTENDED_DATA
- 6.7.4.8. EFI_LEGACY_OPROM_EXTENDED_DATA
- 6.7.4.9. EFI_RETURN_STATUS_EXTENDED_DATA
- 6.7.1. Computing Unit Class
- 7. Report Status Code Routers
- 8. PCD
- 8.1. PCD Protocol Definitions
- 8.1.1. PCD Protocol
- 8.1.1.1. EFI_PCD_PROTOCOL
- 8.1.1.2. EFI_PCD_PROTOCOL.SetSku ()
- 8.1.1.3. EFI_PCD_PROTOCOL.Get8 ()
- 8.1.1.4. EFI_PCD_PROTOCOL.Get16 ()
- 8.1.1.5. EFI_PCD_PROTOCOL.Get32 ()
- 8.1.1.6. EFI_PCD_PROTOCOL.Get64 ()
- 8.1.1.7. EFI_PCD_PROTOCOL.GetPtr ()
- 8.1.1.8. EFI_PCD_PROTOCOL.GetBool ()
- 8.1.1.9. EFI_PCD_PROTOCOL.GetSize ()
- 8.1.1.10. EFI_PCD_PROTOCOL.Set8 ()
- 8.1.1.11. EFI_PCD_PROTOCOL.Set16 ()
- 8.1.1.12. EFI_PCD_PROTOCOL.Set32 ()
- 8.1.1.13. EFI_PCD_PROTOCOL.Set64 ()
- 8.1.1.14. EFI_PCD_PROTOCOL.SetPtr ()
- 8.1.1.15. EFI_PCD_PROTOCOL.SetBool ()
- 8.1.1.16. EFI_PCD_PROTOCOL.CallbackOnSet ()
- 8.1.1.17. EFI_PCD_PROTOCOL.CancelCallback ()
- 8.1.1.18. EFI_PCD_PROTOCOL.GetNextToken ()
- 8.1.1.19. EFI_PCD_PROTOCOL.GetNextTokenSpace ()
- 8.1.2. Get PCD Information Protocol
- 8.1.1. PCD Protocol
- 8.2. PCD PPI Definitions
- 8.2.1. PCD PPI
- 8.2.1.1. EFI_PEI_PCD_PPI
- 8.2.1.2. EFI_PEI_PCD_PPI.SetSku ()
- 8.2.1.3. EFI_PEI_PCD_PPI.Get8 ()
- 8.2.1.4. EFI_PEI_PCD_PPI.Get16 ()
- 8.2.1.5. EFI_PEI_PCD_PPI.Get32 ()
- 8.2.1.6. EFI_PEI_PCD_PPI.Get64 ()
- 8.2.1.7. EFI_PEI_PCD_PPI.GetPtr ()
- 8.2.1.8. EFI_PEI_PCD_PPI.GetSize ()
- 8.2.1.9. EFI_PEI_PCD_PPI.Set8 ()
- 8.2.1.10. EFI_PEI_PCD_PPI.Set16 ()
- 8.2.1.11. EFI_PEI_PCD_PPI.Set32 ()
- 8.2.1.12. EFI_PEI_PCD_PPI.Set64 ()
- 8.2.1.13. EFI_PEI_PCD_PPI.SetPtr ()
- 8.2.1.14. EFI_PEI_PCD_PPI.SetBool()
- 8.2.1.15. EFI_PEI_PCD_PPI.CallbackOnSet ()
- 8.2.1.16. EFI_PEI_PCD_PPI.CancelCallback ()
- 8.2.1.17. EFI_PEI_PCD_PPI.GetNextToken ()
- 8.2.1.18. EFI_PEI_PCD_PPI.GetNextTokenSpace ()
- 8.2.2. Get PCD Information PPI
- 8.2.1. PCD PPI
- 8.1. PCD Protocol Definitions
- 1. Overview
- 1.1. Definition of Terms
- 1.2. Management Mode (MM)
- 1.3. MM Driver Execution Environment
- 1.4. Initializing Management Mode in MM Traditional Mode
- 1.5. Initializing Management Mode in MM StandaloneMode
- 1.6. Entering & Exiting MM
- 1.7. MM Traditional Drivers
- 1.8. MM Traditional Driver Initialization
- 1.9. MM Standalone Driver Initialization
- 1.10. MM Traditional Driver Runtime
- 1.11. MM Standalone Driver Runtime
- 1.12. Dispatching MMI Handlers
- 1.13. MM Services
- 1.14. MM UEFI Protocols
- 2. MM Foundation Entry Point
- 3. Management Mode System Table (MMST)
- 3.1. MMST Introduction
- 3.2. EFI_MM_SYSTEM_TABLE
- 3.2.1. MmInstallConfigurationTable()
- 3.2.2. MmAllocatePool()
- 3.2.3. MmFreePool()
- 3.2.4. MmAllocatePages()
- 3.2.5. MmFreePages()
- 3.2.6. MmStartupThisAp()
- 3.2.7. MmInstallProtocolInterface()
- 3.2.8. MmUninstallProtocolInterface()
- 3.2.9. MmHandleProtocol()
- 3.2.10. MmRegisterProtocolNotify()
- 3.2.11. MmLocateHandle()
- 3.2.12. MmLocateProtocol()
- 3.2.13. MmiManage()
- 3.2.14. MmiHandlerRegister()
- 3.2.15. MmiHandlerUnRegister()
- 4. MM Protocols
- 4.1. Introduction
- 4.2. Status Codes Services
- 4.3. CPU Save State Access Services
- 4.3.1. EFI_MM_CPU_PROTOCOL
- 4.3.2. EFI_MM_CPU_PROTOCOL.ReadSaveState()
- 4.3.3. AARCH32/AARCH64 REGISTER AVAILABILITY
- 4.3.4. EFI_MM_SAVE_STATE_ARM_CSR, EFI_MM_SAVE_STATE_AARCH64_CSR
- 4.3.5. EFI_MM_SAVE_STATE_REGISTER_PROCESSOR_ID
- 4.3.6. EFI_MM_SAVE_STATE_REGISTER_LMA
- 4.3.7. EFI_MM_CPU_PROTOCOL.WriteSaveState()
- 4.4. MM Save State IO Info
- 4.5. MM CPU I/O Protocol
- 4.6. MM PCI I/O Protocol
- 4.7. MM Ready to Lock Protocol
- 4.8. MM MP protocol
- 4.8.1. EFI_MM_MP_PROTOCOL
- 4.8.2. EFI_MM_MP_PROTOCOL.Revision
- 4.8.3. EFI_MM_MP_PROTOCOL.Attributes
- 4.8.4. EFI_MM_MP_PROTOCOL.GetNumberOfProcessors()
- 4.8.5. EFI_MM_MP_PROTOCOL.DispatchProcedure()
- 4.8.6. EFI_MM_MP_PROTOCOL.BroadcastProcedure()
- 4.8.7. EFI_MM_MP_PROTOCOL.SetStartupProcedure()
- 4.8.8. EFI_MM_MP_PROTOCOL.CheckOnProcedure()
- 4.8.9. EFI_MM_MP_PROTOCOL.WaitForProcedure()
- 4.9. MM Configuration Protocol
- 4.10. MM End Of PEI Protocol
- 4.11. MM UEFI Ready Protocol
- 4.12. MM Ready To Boot Protocol
- 4.13. MM Exit Boot Services Protocol
- 4.14. MM Security Architecture Protocol
- 4.15. MM End of DXE Protocol
- 4.16. MM Handler State Notification Protocol
- 5. UEFI Protocols
- 6. PI PEI PPIs
- 7. MM Child Dispatch Protocols
- 7.1. Introduction
- 7.2. MM Software Dispatch Protocol
- 7.3. MM Sx Dispatch Protocol
- 7.4. MM Periodic Timer Dispatch Protocol
- 7.5. MM USB Dispatch Protocol
- 7.6. MM General Purpose Input (GPI) Dispatch Protocol
- 7.7. MM Standby Button Dispatch Protocol
- 7.8. MM Power Button Dispatch Protocol
- 7.9. MM IO Trap Dispatch Protocol
- 7.10. HOBs
- 8. Interactions with PEI, DXE, and BDS
- 9. Other Related Notes For Support Of MM Drivers
- 10. MCA/INIT/PMI Protocol
- 11. Extended SAL Services
- 11.1. SAL Overview
- 11.2. Extended SAL Boot Service Protocol
- 11.2.1. EXTENDED_SAL_BOOT_SERVICE_PROTOCOL
- 11.2.2. EXTENDED_SAL_BOOT_SERVICE_PROTOCOL.AddSalSystemTableInfo()
- 11.2.3. EXTENDED_SAL_BOOT_SERVICE_PROTOCOL.AddSalSystemTableEntry()
- 11.2.4. EXTENDED_SAL_BOOT_SERVICE_PROTOCOL.AddExtendedSalProc()
- 11.2.5. EXTENDED_SAL_BOOT_SERVICE_PROTOCOL.ExtendedSalProc()
- 11.3. Extended SAL Service Classes
- 11.4. Extended SAL Stall Services Class
- 11.4.1. ExtendedSalStall
- 11.4.2. Extended SAL Real Time Clock Services Class
- 11.4.3. ExtendedSalGetTime
- 11.4.4. ExtendedSalSetTime
- 11.4.5. ExtendedSalGetWakeupTime
- 11.4.6. ExtendedSalSetWakeupTime
- 11.4.7. Extended SAL Reset Services Class
- 11.4.8. ExtendedSalResetSystem
- 11.4.9. Extended SAL PCI Services Class
- 11.4.10. ExtendedSalPciRead
- 11.4.11. ExtendedSalPciWrite
- 11.4.12. Extended SAL Cache Services Class
- 11.4.13. ExtendedSalCacheInit
- 11.4.14. ExtendedSalCacheFlush
- 11.4.15. Extended SAL PAL Services Class
- 11.4.16. ExtendedSalPalProc
- 11.4.17. ExtendedSalSetNewPalEntry
- 11.4.18. ExtendedSalGetNewPalEntry
- 11.4.19. ExtendedSalUpdatePal
- 11.4.20. Extended SAL Status Code Services Class
- 11.4.21. ExtendedSalReportStatusCode
- 11.4.22. Extended SAL Monotonic Counter Services Class
- 11.4.23. ExtendedSalGetNextHighMtc
- 11.4.24. Extended SAL Variable Services Class
- 11.4.25. ExtendedSalGetVariable
- 11.4.26. ExtendedSalGetNextVariableName
- 11.4.27. ExtendedSalSetVariable
- 11.4.28. ExtendedSalQueryVariableInfo
- 11.4.29. Extended SAL Firmware Volume Block ServicesClass
- 11.4.30. ExtendedSalRead
- 11.4.31. ExtendedSalWrite
- 11.4.32. ExtendedSalEraseBlock
- 11.4.33. ExtendedSalGetAttributes
- 11.4.34. ExtendedSalSetAttributes
- 11.4.35. ExtendedSalGetPhysicalAddress
- 11.4.36. ExtendedSalGetBlockSize
- 11.4.37. ExtendedSalEraseCustomBlockRange
- 11.4.38. Extended SAL MCA Log Services Class
- 11.4.39. ExtendedSalGetStateInfo
- 11.4.40. ExtendedSalGetStateInfoSize
- 11.4.41. ExtendedSalClearStateInfo
- 11.4.42. ExtendedSalGetStateBuffer
- 11.4.43. ExtendedSalSaveStateBuffer
- 11.4.44. Extended SAL Base Services Class
- 11.4.45. ExtendedSalSetVectors
- 11.4.46. ExtendedSalMcRendez
- 11.4.47. ExtendedSalMcSetParams
- 11.4.48. ExtendedSalGetVectors
- 11.4.49. ExtendedSalMcGetParams
- 11.4.50. ExtendedSalMcGetMcParams
- 11.4.51. ExtendedSalGetMcCheckinFlags
- 11.4.52. ExtendedSalGetPlatformBaseFreq
- 11.4.53. ExtendedSalRegisterPhysicalAddr
- 11.4.54. Extended SAL MP Services Class
- 11.4.55. ExtendedSalAddCpuData
- 11.4.56. ExtendedSalRemoveCpuData
- 11.4.57. ExtendedSalModifyCpuData
- 11.4.58. ExtendedSalGetCpuDataById
- 11.4.59. ExtendedSalGetCpuDataByIndex
- 11.4.60. ExtendedSalWhoiAmI
- 11.4.61. ExtendedSalNumProcessors
- 11.4.62. ExtendedSalSetMinState
- 11.4.63. ExtendedSalGetMinState
- 11.4.64. ExtendedSalPhysicalIdInfo
- 11.4.65. Extended SAL MCA Services Class
- 11.4.66. ExtendedSalMcaGetStateInfo
- 11.4.67. ExtendedSalMcaRegisterCpu
- 12. SMM SPI Protocol Stack
- 12.1. Design
- 12.2. SMM SPI Protocols
- 12.2.1. EFI_LEGACY_SPI_SMM_FLASH_PROTOCOL_GUID
- 12.2.2. EFI_SPI_SMM_NOR_FLASH_PROTOCOL_GUID
- 12.2.3. EFI_SPI_SMM_CONFIGURATION_PROTOCOL_GUID
- 12.2.4. EFI_SPI_SMM_HC_PROTOCOL_GUID
- 12.2.5. EFI LEGACY_SPI_SMM_CONTROLLER_PROTOCOL_GUID
- 12.2.6. EFI_LEGACY_SPI_SMM_CONTROLLER_PROTOCOL_GUID
- 12.2.7. EFI_SPI_SMM_NOR_FLASH_BLOCK_MAP_PROTOCOL_GUID
- 1. Introduction
- 2. SMBus Host Controller Design Discussion
- 3. SMBus Host Controller Code Definitions
- 4. SMBus Design Discussion
- 5. SMBus PPI Code Definitions
- 6. SMBIOS Protocol
- 7. IDE Controller
- 7.1. IDE Controller Overview
- 7.2. Design Discussion
- 7.3. Code Definitions
- 7.3.1. EFI_IDE_CONTROLLER_INIT_PROTOCOL
- 7.3.2. EFI_IDE_CONTROLLER_INIT_PROTOCOL
- 7.3.3. EFI_IDE_CONTROLLER_INIT_PROTOCOL.GetChannelInfo()
- 7.3.4. EFI_IDE_CONTROLLER_INIT_PROTOCOL.NotifyPhase()
- 7.3.5. EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- 7.3.6. EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()
- 7.3.7. EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode()
- 7.3.8. EFI_IDE_CONTROLLER_INIT_PROTOCOL.SetTiming()
- 7.3.9. IDE Disk Information Protocol
- 7.3.10. EFI_DISK_INFO_PROTOCOL
- 7.3.11. EFI_DISK_INFO_PROTOCOL.Interface
- 7.3.12. EFI_DISK_INFO_PROTOCOL.Inquiry()
- 7.3.13. EFI_DISK_INFO_PROTOCOL.Identify()
- 7.3.14. EFI_DISK_INFO_PROTOCOL.SenseData()
- 7.3.15. EFI_DISK_INFO_PROTOCOL.WhichIde()
- 8. S3 Resume
- 8.1. S3 Overview
- 8.2. Goals
- 8.3. Requirements
- 8.4. Assumptions
- 8.5. Restoring the Platform
- 8.6. PEI Boot Script Executer PPI
- 8.7. S3 Save State Protocol
- 8.7.1. EFI_S3_SAVE_STATE_PROTOCOL
- 8.7.2. Save State Write
- 8.7.3. EFI_S3_SAVE_STATE_PROTOCOL.Write()
- 8.7.4. EFI_BOOT_SCRIPT_IO_WRITE_OPCODE
- 8.7.5. EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE
- 8.7.6. EFI_BOOT_SCRIPT_IO_POLL_OPCODE
- 8.7.7. EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE
- 8.7.8. EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE
- 8.7.9. EFI_BOOT_SCRIPT_MEM_POLL_OPCODE
- 8.7.10. EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE
- 8.7.11. EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE
- 8.7.12. EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE
- 8.7.13. EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE
- 8.7.14. EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE
- 8.7.15. EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE
- 8.7.16. EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE
- 8.7.17. EFI_BOOT_SCRIPT_STALL_OPCODE
- 8.7.18. EFI_BOOT_SCRIPT_DISPATCH_OPCODE
- 8.7.19. EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE
- 8.7.20. EFI_BOOT_SCRIPT_INFORMATION_OPCODE
- 8.7.21. Save State Insert
- 8.7.22. EFI_S3_SAVE_STATE_PROTOCOL.Insert()
- 8.7.23. Save State Label
- 8.7.24. EFI_S3_SAVE_STATE_PROTOCOL.Label()
- 8.7.25. Save State Compare
- 8.7.26. EFI_S3_SAVE_STATE_PROTOCOL.Compare()
- 8.8. S3 SMM Save State Protocol
- 9. ACPI System Description Table Protocol
- 9.1. EFI_ACPI_SDT_PROTOCOL
- 9.1.1. EFI_ACPI_SDT_PROTOCOL.GetAcpiTable()
- 9.1.2. EFI_ACPI_SDT_PROTOCOL.RegisterNotify()
- 9.1.3. EFI_ACPI_SDT_PROTOCOL.Open()
- 9.1.4. EFI_ACPI_SDT_PROTOCOL.OpenSdt()
- 9.1.5. EFI_ACPI_SDT_PROTOCOL.Close()
- 9.1.6. EFI_ACPI_SDT_PROTOCOL.GetChild()
- 9.1.7. EFI_ACPI_SDT_PROTOCOL.GetOption()
- 9.1.8. EFI_ACPI_SDT_PROTOCOL.SetOption()
- 9.1.9. EFI_ACPI_SDT_PROTOCOL.FindPath()
- 9.1. EFI_ACPI_SDT_PROTOCOL
- 10. PCI Host Bridge
- 10.1. PCI Host Bridge Overview
- 10.2. PCI Host Bridge Design Discussion
- 10.3. PCI Host Bridge Resource Allocation Protocol
- 10.4. Sample PCI Architectures
- 10.5. ISA Aliasing Considerations
- 10.6. Programming of Standard PCI Configuration Registers
- 10.7. Sample Implementation
- 10.8. PCI HostBridge Code Definitions
- 10.8.1. Introduction
- 10.8.2. PCI Host Bridge Resource Allocation Protocol
- 10.8.3. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
- 10.8.4. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.NotifyPhase()
- 10.8.5. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.GetNextRootBridge()
- 10.8.6. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.GetAllocAttributes()
- 10.8.7. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.StartBusEnumeration()
- 10.8.8. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.SetBusNumbers()
- 10.8.9. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.SubmitResources()
- 10.8.10. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.GetProposedResources()
- 10.8.11. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.PreprocessController()
- 10.9. End of PCI Enumeration Overview
- 11. PCI Platform
- 11.1. Introduction
- 11.2. PCI Platform Overview
- 11.3. PCI Platform Support Related Information
- 11.4. PCI Platform Protocol
- 11.5. Incompatible PCI Device Support Protocol
- 11.6. PCI Code Definitions
- 11.6.1. PCI Platform Protocol
- 11.6.2. EFI_PCI_PLATFORM_PROTOCOL
- 11.6.3. EFI_PCI_PLATFORM_PROTOCOL.PlatformNotify()
- 11.6.4. EFI_PCI_PLATFORM_PROTOCOL.PlatformPrepController()
- 11.6.5. EFI_PCI_PLATFORM_PROTOCOL.GetPlatformPolicy()
- 11.6.6. EFI_PCI_PLATFORM_PROTOCOL.GetPciRom()
- 11.6.7. PCI Override Protocol
- 11.6.8. EFI_PCI_OVERRIDE_PROTOCOL
- 11.6.9. Incompatible PCI Device Support Protocol
- 11.6.10. EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
- 11.6.11. EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.CheckDevice()
- 12. Hot Plug PCI
- 12.1. HOT PLUG PCI Overview
- 12.2. Hot Plug PCI Initialization Protocol Introduction
- 12.3. Hot Plug PCI Initialization Protocol RelatedInformation
- 12.4. Requirements
- 12.5. Sample Implementation for a Platform Containing PCIHot Plug* Slots
- 12.6. PCI Hot Plug PCI Initialization Protocol
- 12.7. PCI Hot Plug Request Protocol
- 12.8. Sample Implementation for a Platform Containing PCIHot Plug* Slots
- 13. Super I/O Protocol
- 14. Super I/O and ISA Host Controller Interactions
- 15. CPU I/O Protocol
- 16. Legacy Region Protocol
- 17. I2C Protocol Stack
- 17.1. Design Discussion
- 17.2. DXE Code definitions
- 17.2.1. I2C Master Protocol
- 17.2.2. EFI_I2C_MASTER_PROTOCOL
- 17.2.3. EFI_I2C_MASTER_PROTOCOL.SetBusFrequency()
- 17.2.4. EFI_I2C_MASTER_PROTOCOL.Reset()
- 17.2.5. EFI_I2C_MASTER_PROTOCOL.StartRequest()
- 17.2.6. I2C Host Protocol
- 17.2.7. EFI_I2C_HOST_PROTOCOL
- 17.2.8. EFI_I2C_HOST_PROTOCOL.QueueRequest()
- 17.2.9. I2C I/O Protocol
- 17.2.10. EFI_I2C_IO_PROTOCOL
- 17.2.11. EFI_I2C_IO_PROTOCOL.QueueRequest()
- 17.2.12. I2C Bus Configuration Management Protocol
- 17.2.13. EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL
- 17.2.14. EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL.EnableI2cBusConfiguration()
- 17.2.15. I2C Enumerate Protocol
- 17.2.16. EFI_I2C_ENUMERATE_PROTOCOL
- 17.2.17. EFI_I2C_ENUMERATE_PROTOCOL.Enumerate()
- 17.2.18. EFI_I2C_ENUMERATE_PROTOCOL.GetBusFrequency()
- 17.3. PEI Code definitions
- 17.3.1. I2C Master PPI
- 17.3.2. EFI_PEI_I2C_MASTER
- 17.3.3. EFI_PEI_I2C_MASTER_PPI.SetBusFrequency()
- 17.3.4. EFI_PEI_I2C_MASTER_PPI.Reset()
- 17.3.5. EFI_PEI_I2C_MASTER_PPI.StartRequest()
- 17.3.6. I2C Host PPI
- 17.3.7. EFI_PEI_I2C_HOST
- 17.3.8. EFI_PEI_I2C_HOST.StartRequest()
- 17.3.9. I2C I/O PPI
- 17.3.10. EFI_PEI_I2C_IO
- 17.3.11. EFI_I2C_IO_PROTOCOL.GetDeviceInfo()
- 17.3.12. EFI_I2C_IO_PROTOCOL.GetDeviceInfoIdList()
- 17.3.13. EFI_PEI_I2C_IO.StartRequest()
- 17.3.14. I2C Bus Configuration Management PPI
- 17.3.15. EFI_PEI_I2C_BUS_CONFIGURATION_MANAGEMENT
- 17.3.16. EFI_PEI_I2C_BUS_CONFIGURATION_MANAGEMENT.EnableI2cBusConfiguration()
- 17.3.17. EFI_PEI_I2C_BUS_CONFIGURATION_MANAGEMENT.I2cDeviceReset()
- 17.3.18. I2C Enumerate PPI
- 17.3.19. EFI_PEI_I2C_ENUMERATE
- 17.3.20. EFI_PEI_I2C_ENUMERATE_PROTOCOL.Enumerate()
- 17.3.21. EFI_PEI_I2C_ENUMERATE_PROTOCOL.GetBusFrequency()
- 18. SPI Protocol Stack
- 18.1. Design Discussion
- 18.2. DXE Code Definitions
- 18.2.1. EFI_SPI_CONFIGURATION_PROTOCOL
- 18.2.2. EFI_SPI_CHIP_SELECT
- 18.2.3. EFI_SPI_PART
- 18.2.4. EFI_SPI_PERIPHERAL
- 18.2.5. EFI_SPI_CLOCK
- 18.2.6. EFI_SPI_BUS
- 18.2.7. EFI_SPI_NOR_FLASH_PROTOCOL
- 18.2.8. SPI Flash Driver GUID
- 18.2.9. EFI_SPI_NOR_FLASH_PROTOCOL.GetFlashld()
- 18.2.10. EFI_SPI_NOR_FLASH_PROTOCOL.ReadData()
- 18.2.11. EFI_SPI_NOR_FLASH_PROTOCOL.LfReadData()
- 18.2.12. EFIEFI_SPI_NOR_FLASH_PROTOCOL.ReadStatus()
- 18.2.13. EFI_SPI_NOR_FLASH_PROTOCOL.WriteStatus()
- 18.2.14. EFI_SPI_NOR_FLASH_PROTOCOL.WriteData()
- 18.2.15. EFI_SPI_NOR_FLASH_PROTOCOL.Erase()
- 18.2.16. EFI_LEGACY_SPI_FLASH_PROTOCOL
- 18.2.17. EFI_LEGACY _SPI_FLASH_PROTOCOL.BiosBaseAddress()
- 18.2.18. EFI_LEGACY_SPI_FLASH_PROTOCOL.ClearSpiProtect()
- 18.2.19. EFI_LEGACY_SPI_FLASH_PROTOCOL.lsRangeProtected()
- 18.2.20. EFI_LEGACY_SPI_FLASH_PROTOCOL.ProtectNextRange()
- 18.2.21. EFI_LEGACY_SPI_FLASH_PROTOCOL.LockController()
- 18.2.22. EFI_SPI_IO_PROTOCOL
- 18.2.23. EFI_SPI_BUS_TRANSACTION
- 18.2.24. EFI_SPI_IO_PROTOCOL.Transaction()
- 18.2.25. EFI_SPI_IO_PROTOCOL.UpdateSpiPeripheral()
- 18.2.26. EFI_SPI_HC_PROTOCOL
- 18.2.27. EFI_SPI_HC_PROTOCOL.ChipSelect()
- 18.2.28. EFI_SPI_HC_PROTOCOL.Clock()
- 18.2.29. EFI_SPI_HC_PROTOCOL.Transaction()
- 18.2.30. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL
- 18.2.31. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL.EraseBlockOpcode()
- 18.2.32. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL.WriteStatusPrefix()
- 18.2.33. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL.BiosBaseAddress()
- 18.2.34. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL.ClearSpiProtect()
- 18.2.35. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL.lsRangeProtected()
- 18.2.36. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL.ProtectNextRange()
- 18.2.37. EFI_LEGACY_SPI_CONTROLLER_PROTOCOL.LockController()
- 18.2.38. EFI_SPI_NOR_FLASH_BLOCK_MAP_PROTOCOL
- 18.2.39. EFI_SPI_NOR_FLASH_BLOCK_MAP